1. Field of the Invention
The present invention relates to a semiconductor device having a multi-layer wiring structure, and more particularly to a technique for forming an electrical connection between wirings via an interlayer insulating film.
2. Description of the Related Art
Among wiring structures of what is called a semiconductor integrated circuit, multiple circuit elements of which are formed over/inside a substrate, there is known a multi-layer wiring structure in which different wiring layers are electrically insulated from each other using an insulating film containing silicon oxide and the like called an interlayer insulating film.
When wirings that are formed to sandwich an interlayer insulating film are brought into contact with each other, a method for obtaining a contact by forming an opening called a contact hole in the interlayer insulating film is adopted. In addition, in microfabrication technologies of a semiconductor integrated circuit, a method for interposing a columnar conductive member between the upper-layer wiring and the lower-layer wiring so as to obtain a contact has been developed. For example, a technique for obtaining a contact between the upper-layer wiring and the lower-layer wiring by providing a projecting conductive member on the lower-layer wiring is disclosed (see Patent Documents 1 and 2).
[Patent Document 1]
Japanese Patent Laid-Open No. 6-314687
[Patent Document 2]
Japanese Patent Laid-Open No. 8-306779
In the case of forming a multi-layer wiring structure, it is required that processes for forming wirings or those for forming an electrical connection between different wirings are not complex, but as simple as possible.
However, as for the method for forming the lower-layer wiring or a conductive film for the lower-layer wiring and subsequently forming a projecting conductive member thereover as in the conventional technology, the process can not be carried out unless a conductive film to serve as an etching stopper is interposed between the conductive film for the lower-layer wiring and a conductive film for forming the projecting conductive member, which is disadvantage in that it provides fewer alternatives for the material to be used.
When adopting steps for forming a conductive film from which the lower-layer wiring and a conductive film to form a projecting conductive member are formed, the resulting total film thickness is thick, which would bury a projecting discrimination pattern called an alignment marker formed in the lower layer in the photolithography step. Therefore, it is difficult to carry out alignment using a camera such as a CCD, hence is difficult to align a photomask with accuracy. Thus, there is a problem that fine pattern formation cannot be achieved.
In view of the following problems, it is a feature of the invention to provide a technology for easily forming a multi-layer wiring structure that is fine and reliable.